In recent years, the semiconductor memory device is used as a memory device to store information in various fields. A flash memory, a RAM, a ROM and the like are used as conventional semiconductor memory devices. They are three-terminal memories that require three control electrodes. In recent years, as an amount of stored information is required to increase, a two-terminal memory that can be controlled with two electrodes is expected to appear. The two-terminal memory takes less occupied area per one unit of memory on a circuit board since it has reduced number of electrodes compared with the three-terminal memory. Therefore, the number of memories per unit area of the circuit board can be increased, and the amount of information per area, that is, a density of the stored information can be expanded. Therefore, a memory device capable of handling a larger amount of information can be manufactured with a board of a small area.
In recent years, a switching resistance RAM is studied as the two-terminal memory. The switching resistance RAM has a structure in which a memory cell formed using a switching layer that switches between an ON state and an OFF state by applying a voltage is connected at an intersection of a bit line and a word line. The switching layer can be regarded as a resistive element in terms of an equivalent circuit, and has a property that its resistance is reduced in the ON state and increased in the OFF state. Writing-in, reading-out and erasing of data can be made by controlling voltages applied to the bit line and the word line.
FIG. 13 shows the structure of the switching resistance RAM as described above. Each of memory cells CEL1-CEL4 that include the switching layer is connected at each of intersections of word lines WL0 and WL1 and bit lines BL0 and BL1, respectively.
Now, suppose the memory cell CEL1 is selected. At that time, the bit line BL1 and the word line WL0 are selected, and their electric potentials are set to an H level and an L level, respectively. An electric potential of the unselected bit line BL0 is set to the L level, and an electric potential of the unselected word line WL1 is set to the H level. Thus, an electric current flowing through the selected memory cell CEL1 can be sensed when a current sense amplifier is connected to the bit line BL1. That is, since the electric current is large when the memory cell CEL1 is set to the ON state and small when it is set to the OFF state, the data (“1” or “0”) stored in the memory cell CEL1 can be read-out based on a result of sensing by the current sense amplifier.
Y. Hosoi et al. “High speed Unipolar Switching Resistance RRAM (RRAM) Technology” IEDM 2006 30-7 and K. Takada, M. Fukumoto, Y. Suda, “Memory Function of a SiO2/β-SiC/Si MIS Diode” Ext. Abs. 1999 International Conference on Solid State and Materials, p. 132-133 (1999) are named as examples of related technical documents.